4-15-Segment Descriptors (cont.)

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x64 Architecture and Programming (Part 2)

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Advanced Architecture

x64ArchAndProg (Part 2).pdf

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4-01-Privilege Levels

4-02-Rings (Extended)

4-03-Mode Transistions

4-04-CPUID

4-05-MSRs

4-06-Control Registers2

4-07-Segmentation3

4-08-Segment Data Structures and Registers

4-09-64-Bit Changes

4-10-Segmentation - The Big Picture

4-12-Segment Registers

4-11-Segment Selectors

4-13-Descriptor Tables

4-14-Segment Descriptors

4-15-Segment Descriptors (cont.)

4-16-Gate Descriptors

4-17-Far Calls

4-18-Privilege Level Types

4-19-Data Access Checks

4-20-Call Transfer Access Checks

4-21-Call Gate Transfers

4-22-Task Management2

Virtual Page Translation

5-01-CPUs, Cores, and Caches

5-02-Page Translation Overview

5-03-Virtual Address Translation

5-04-x86 Legacy Address Translation

5-05-x86 PAE Address Translation

5-06-x64 4 Level Page Translation

5-07-Address Translation Demo

5-08-5 Level Trabslation

5-09-Page Translation Entries

5-10-Page Translation Fields

5-11-TLB

5-12-Page Protection Mechanisms

Miscellaneous Topics

6-01-System Calls

6-02-SWAPSG

6-03-Interrupts and Exceptions

6-04-External Interrupts

6-05-Interrupts and Windows

6-06-Shellcode

6-07-Floating Point Arithmetic

6-08-Summary4